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Yongfeng
Feng
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Candidate for
Ph.D. Electrical
Engineering
Origin:
Sichun, China
Expected
Graduation: May
2003
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| Resume:
PDF
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| email:
yfeng@uark.edu |
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Matt Francis
Candidate for B.S
in Electrical Engineering. |
Biography:
Senior, Electrical
Engineering/Physics
Origin:
Jenks, OK
Expected
Graduation:
Summer 2003
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Pursuing
BS in Electrical
Engineering (May
2003), BS in Physics
(August
2003)
Areas
of Interest:
CAD, Digital Design,
Software, Pervasive
Computing
Project
Group:
PARAGON modeling
Tools
Working
on: Paragon
Digital Enhancements
Matt has been
attending the
University of
Arkansas since
1998 after graduating
from Jenks HS
in Tulsa, OK.
He is currently
studying Electrical
Engineering and
Physics, hopefully
completing both
degrees by Summer
2003. He recently
completed a 7-month
co-op with Hewlett-Packard's
Richardson VLSI
Lab in Richardson,
TX, where he participated
in the functional
verification of
a coherency controller
for HP's high-end
UNIX based systems.
This chip will
be one of the
largest custom
ASICs in the world.
Matt has worked
in the MSCAD lab
since 2000, participating
in the development
of Model Architect,
among other activities.
In his spare time,
Matt plays snare
on the Drumline
in the Marching
Razorback Band,
plays percussion
in the University's
concert bands,
plays with Linux/BSD
and UNIX based
systems, dabbles
in photography,
and works on his
rapidly aging
cars.
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| Resume:
PDF
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RTF |
email:afranci@engr.uark.edu
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Chandrasekhar
Origin:
India
Candidate
for M.S. in Electrical
Engineering
Education:
B.E in Electronics
and Communications
Project
Group: PARAGON
modeling TOOLS |
Areas
of Interest:
Inerested in Behavioral
modeling usint
HDLs like
VHDL-AMS, MAST
and Verilog -A.
Other areas of
inerest include
Basic principles
and algorithms
used for simulators
and analysis of
Analog and Logic
circuits.
Chandu joined
MSCAD lab in August
2002. His work
started with testing
the code generator
for Paragon 1.0,
and writing multi
discipline, mixed
technology models
to the Paragon
model library.
He is presently
working in the
development team
of Paragon and
works on Automatic
Code generation
of VHDL-AMS, MAST
and VTB models
for Paragon 1.1
version release.
Database maitainance,
testing and creating
new models are
his other contributions
to Paragon.
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| Resume:
PDF
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RTF/word |
| email: vchandr@uark.edu |
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| Circuit
Design Group |
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Tiejun
Cao
Candidate for
Ph.D Electrical
Engineering
Origin:
China |
Tiejun's
project is ¡°
Rad-Hard, High-Voltage
Bias circuitry for
a MEMS Microgyroscope
for Micronavigation
Systems ¡±
(A project of Jet
Propulsion Laboratory).
The chip to be designed
will consist of
a power management
and distribution
(PMAD) section,
a high voltage gyro
bias section, a
very low noise sigma
delta signal sense
and processing section
and a digital core.
The PMAD section
I¡¯m
working on will
include a capacitive
DC-DC converter
that will take the
3.3V power supply
as input and produce
a fixed 60V output
voltage. It will
utilize low current,
SOI CMOS-compatible,
high voltage transistors,
and get its high
voltage from the
on chip DC-DC converter
of the PMAD circuit.
Currently he is
working on the design
of PGA for wide
temperature applications. |
| Resume:
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| email:tcao@uark.edu |
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| Tsedeniya
Abraham
Education :
Senior, Electrical
Engineering
Expected date
of Graduation:
2003
Origin:
Addis Ababa, Ethiopia
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Senior
undergraduate with
anticipated date
of graduation December
2003.She is a part
of the circuit design
team. She has been
working on the designing,layout
and testing process
of opamps both in
SOI and MOI processes.She
has also worked
briefly on writing
validation scripts
for comparators
and opamps. |
| Resume:
PDF |
email:tabraha@uark.edu
or tabraha@engr.uark.edu
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| Venu
gopal Reddy Allipuram
Candidate for
M.S. Electrical
Engineering
Biography:
Origin: Hyderabad,India.
Education: Bachelor
Of Technology
in Electrical
Engineering .
Areas
of Interest:
Mixed Signal Circuit
Design ,Submicron
Devices,
IC Design.
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Presently working
on the rad-hard
circuit design
,DC/DC converters.Apart
from this he is
the Webmaster
for this website.
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| Resume:
PDF
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RTF/WORD |
email: vallipu@uark.edu
Homepage:
http://www.pixelheart.com |
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| Richard
Brough
Candidate for
Ph.D in EE
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Working on Digital
Circuit Design |
| Resume:
PDF ||
RTF/WORD |
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| Beth
Woods
Candidate for
Ph.D in EE
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Working on Device
Modeling |
| Resume:
PDF ||
RTF/WORD |
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| Luke
Post
Candidate for
Ph.D in EE
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Working on Analog
and Mixed Signal
Circuit Design |
| Resume:
PDF ||
RTF/WORD |
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| Troy
England
Candidate for
BS in EE
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Working on Analog/Digital
Circuit Design |
| Resume:
PDF ||
RTF/WORD |
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| Uma
Annamalai
Candidate for
MS in EE
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Working on Analog
and Mixed Signal
Circuit Design |
| Resume:
PDF ||
RTF/WORD |
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| Ravi
Kumar Yelleswarapu
Candidate for
PH.D in Micro-EP
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Working on Digital
Circuit Design |
| Resume:
PDF ||
RTF/WORD |
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| Hung
Hoang
Candidate for
Ph.D in EE
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Working on Analog
and Mixed Signal
Circuit Design |
| Resume:
PDF ||
RTF/WORD |
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| Semiconductor
Devices Group |
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| Edgar
Cilio
Candidate for
MS in Electrical
Engineering.
Biography:
Origin: Quito,
Ecuador (US citizenship
eligibility on
July 2004)
Education:University
of Arkansas
BS in Electrical
Engineering–Expected
Date of Graduation
Fall 2004
Northwest
Arkansas Community
College
Asscociate of
Science -- December
2001
Areas
of Interest:signal
processing and
IC design
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Working
Project:
Edgar is working
on development
of virtual instrumentation
using LabView
and LabWindows/CVI.He
is also currently
member of the
Solar Boat Team,
where he is implementing
the telemetry
system of the
boat
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| Resume:
PDF
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RTF/Word |
| email: ecilio@uark.edu |
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| Avinash
Kashyap
Candidate for
M.S. Electrical
Engineering
B.Tech Electrical
& Electronics
Engg.
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Avinash
is involved in
the modeling of
the Silicon Carbide
Static Induction
Transistor using
the MAST Modeling
Language and the
SABER Simulator.
The modeling work
also involves
using the Paragon
software developed
in house at our
MSCAD lab. If
your idea of a
good evening is
discussing Blue
sky research over
a cup of hot Mocha
and seeing the
world pass by,
meet him.
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| Resume:
PDF
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| email:akashya@uark.edu |
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| Alumni |
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| Xiaoling
Huang |
| DEgree: Ph.D |
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| Pinki
Mallick |
| Degree: MSEE |
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M. Omair
Abbasi
Degree: MSEE |
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| Sabyasachi
Mallick
Degree:
MSEE
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| Teuta
Klari,
Degree:
MSEE
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| Seunggwon
Yang
Degree:
MSEE
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| Sharmila
D. Magan Lal
Degree:
MSEE
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Kevin
M. Speer
Degree:
BSEE
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